Designing with VHDL
This course provides a thorough introduction to the VHDL language.The emphasis is on:Writing efficient hardware designsPerforming high-level HDL simulationsEmploying structural, register transfer level (RTL), and beha...
Event Schedule
Virtual Learning Environment (Online)
- 07.01. - 09.01.2025 09:00-17:00 — € 2,550.00 excl. VAT Add to cart
- 15.04. - 17.04.2025 09:00-17:00 — € 2,250.00 excl. VAT Add to cart