Designing with the Zynq UltraScale+ RFSoC

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Course Description

This training content is structured to provide designers with an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family. Special emphasis is placed on the Data Converter and Soft-Decision FEC blocks. Power estimation is covered to help designers identify the power demands of the device in various operating modes. Since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device, proper layout and PCB considerations are also covered.

Release Date

November 2018

Level

Training Duration

Who Should Attend?

Prerequisites

Skills Gained

After completing this comprehensive training, you will know how to:

Course Outline



  • Workshop Overview
  • Zynq UltraScale+ MPSoC Overview
  • Zynq UltraScale+ RFSoC Overview
  • RFSoC ADC
  • RFSoC DAC
  • RFSoC Data Converter Design
  • PCB Design for RFSoC Devices
  • RFSoC SD-FEC

Lab Descriptions

Event Schedule

No events found. Event request.

Partner

Xilinx
Updated at: 2018-11-11 13:02to the top