Designing with the Zynq UltraScale+ RFSoC

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Course Description

This training content is structured to provide designers with an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family. Special emphasis is placed on the Data Converter and Soft-Decision FEC blocks. Power estimation is covered to help designers identify the power demands of the device in various operating modes. Since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device, proper layout and PCB considerations are also covered.

Release Date

December 2018

Level

Connectivity 3

Training Duration

2 days

Who Should Attend?

Hardware designers interested in understanding the architecture and capabilities of the Zynq UltraScale+ RFSoC data converter and SD-FEC hard blocks.

Prerequisites

  • _Understanding of the Zynq UltraScale+ MPSoC architecture
  • Basic familiarity with data converter terms and principles
  • Basic familiarity with forward error correction terms and principles

Skills Gained

After completing this comprehensive training, you will know how to:

  • Describe in general the new Zynq UltraScale+ RFSoC family
  • Identify typical applications for the data converters
  • Describe the architecture and functionality of the ADC
  • Utilize the ADC via configuration, simulation, and implementation
  • Describe the architecture and functionality of the DAC
  • Utilize the DAC via configuration, simulation, and implementation
  • Identify the requirements and options for data converter PCB designs
  • Describe the architecture and functionality of the SD-FEC hard IP
  • Utilize the SD-FEC
  • Course Outline



    • Workshop Overview
    • Zynq UltraScale+ MPSoC Overview
    • Zynq UltraScale+ RFSoC Overview
    • RFSoC ADC
    • RFSoC DAC
    • RFSoC Data Converter Design
    • PCB Design for RFSoC Devices
    • RFSoC SD-FEC

    Topic Descriptions

  • Zynq UltraScale+ RFSoC Overview – Overview of the Zynq UltraScale+ RFSoC architecture, including brief introductions to RF, data converter solutions, SD-FEC solutions, driver support, and tool support.
  • RF-ADC – Covers the basics of ADCs. Reviews ADC architecture, functionality, interfaces, configuration, and driver support.
  • RF-DAC – Covers the basics of DACs. Reviews DAC architecture, functionality, interfaces, configuration, and driver support.
  • Data Converter Design – Describes common features, the design flow, and utilizing the example design by simulation and implementation.
  • PCB Design for RFSoC Devices – Describes power requirements, performing power estimation, and utilizing the power design. Analog signal requirements, PCB materials and layer stackup options, and analog trace design are also covered.
  • Soft-Decision FEC – Covers the basics of forward error correction. Reviews SD-FEC architecture, functionality, interfaces, configuration, and driver support.
  • Event Schedule

    so-logic (top1) (Austria)
    • 05.01. - 06.01.2020 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 07.04. - 08.04.2020 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 18.06. - 19.06.2020 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 13.08. - 14.08.2020 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 15.10. - 16.10.2020 09:00-17:00 — € 1,500.00 excl. VAT Add to cart

    Partner

    Xilinx
    Updated at: 2019-07-23 12:17to the top