Zynq SoC System Architecture

En

Course Description

The Xilinx Zynq System on a Chip (SoC) device provides a new level of system design capabilities. This course provides experienced system architects with the knowledge to effectively architect a Zynq SoC device. This course presents the features and benefits of the Zynq architecture, and the course covers the architecture of the ARM ™ Cortex™-A9 processor-based processing system (PS) and the connections to the programmable logic (PL), at a sufficiently deep level.The course details the individual components that comprise the PS: I/O peripherals, timers, caching, DMA, interrupt, and memory controllers. Emphasis is placed on effective access and usage of the PS DDR controller from PL user logic, efficient PL-to-PS interfacing, and design techniques, trade offs, and advantages of implementing functions in the PS or the PL.

Release Date

November 2018

Level

Training Duration

Who Should Attend?

Prerequisites

Skills Gained

After completing this comprehensive training, you will know how to:

Course Outline

Lab Descriptions

Event Schedule

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