Designing with the Versal ACAP: Architecture and Methodology
Course Description
In this course you will learn about Versal™ ACAP architecture and design methodology. The emphasis of this course is on:
- Reviewing the architecture of the Versal ACAP
- Describing the different engines available in the Versal architecture and what resources they contain
- Utilizing the hardened blocks available in the Versal architecture
- Using the design tools and methodology provided by Xilinx to create complex systems
- Describing the network on chip (NoC) and AI Engine concepts and ther architectures
- Performing system-level simulation and debugging
Release Date
December 2020Level
Connectivity 3Training Duration
3 days
Who Should Attend?
Software and hardware developers, system architects, and anyone who wants to learn about the architecture of the Xilinx Versal ACAP devicePrerequisites
- Comfort with the C/C++ programming language
- Vitis™ IDE software development flow
- Hardware development flow with the Vivado® Design Suite
- Basic knowledge of UltraScale™/UltraScale+™ FPGAs and Zynq® UltraScale+ MPSoCs
Skills Gained
After completing this comprehensive training, you will know how to:- Describe the Versal ACAP architecture at a high level
- Describe the various engines in the Versal ACP device
- Use the various blocks from the Versal architecture to create complex systems
- Utilize the ADC via configuration, simulation, and implementation
- Perform system-level simulation and debugging
- Identify and apply different design methodologies
Course Outline
- Architecture Overview
- Adaptable Engines (PL)
- Processing System
- PMC and Boot and Configuration
- SelectIO Resources
- Clocking Architecture
- System Interrupts
- Timers, Counters, and RTC
- Software Build Flow
- Software Stack
- DSP Engine
- AI Engine
- NoC Introduction and Concepts
- Device Memory
- Programming Interfaces
- Application Partitioning
- PCI Express & CCIX
- Serial Transceivers
- Power and Thermal Solutions
- Debugging
- Security Features
- System Simulation
- System Design Methodology
Event Schedule
No events found. Event request.